Experienced ASIC Verification Engineer
At Hudson River Trading (HRT) we are mathematicians, computer scientists, statisticians, physicists and engineers. We research and develop automated trading algorithms using advanced mathematical techniques. We have built one of the world's most sophisticated computing environments, and our researchers are at the forefront of innovation in the world of algorithmic trading.
Job Description
The hardware team at Hudson River Trading (HRT) creates ultra-low latency products to support our trading on global markets. High performance designs require even higher performance verification. Our ideal candidate is not only an ace tester, but a practicing toolsmith. You know the EDA landscape and want to be part of a team actively working to rethink, redesign, and surpass the status quo.
We are looking for an Experienced ASIC Verification Engineer who is skilled at writing testbenches and building verification environments to exercise complex hardware. ASIC verification is part of a small but growing team at HRT that is integral to the success of our trading. You can expect to always be challenged by the ever-changing financial markets as you work on critical hardware and software in a collaborative, latency-sensitive environment.
Responsibilities
- Create unit, subsystem, and full-chip testbenches and tests
- Define and develop verification environments for ASICs
- Write detailed verification plans
- Quickly root-cause RTL bugs
- Apply Universal Verification Methodology (UVM) at various levels of the design hierarchy (block, system, etc.)
- Collaborate directly with designers for rapid bringup of new projects and debugging of existing designs
- Manage regression and continuous integration infrastructure
- Develop and improve open-source and internal tools
Qualifications
- A bachelor's degree in Computer or Electrical Engineering or a related field
- Strong background (4+ years) in RTL functional verification
- Excellent debugging and analytical skills
- Solid understanding of digital design concepts
- Experience with code and functional coverage collection/analysis
- Experience with formal verification techniques, including model and equivalence checking, is a plus
- Comfortable in a Linux environment
- Experience with Python is preferred
- Experience with networking protocols preferred
- C++ experience is a plus
Annual base salary range of $150,000 to $200,000. Pay (base and bonus) may vary depending on job-related skills and experience. A sign-on and discretionary performance bonus may be provided as part of the total compensation package, in addition to company-paid medical and/or other benefits.
Culture
Hudson River Trading (HRT) brings a scientific approach to trading financial products. We have built one of the world's most sophisticated computing environments for research and development. Our researchers are at the forefront of innovation in the world of algorithmic trading.
At HRT we welcome a variety of expertise: mathematics and computer science, physics and engineering, media and tech. We’re a community of self-starters who are motivated by the excitement of being at the cutting edge of automation in every part of our organization—from trading, to business operations, to recruiting and beyond. We value openness and transparency, and celebrate great ideas from HRT veterans and new hires alike. At HRT we’re friends and colleagues – whether we are sharing a meal, playing the latest board game, or writing elegant code. We embrace a culture of togetherness that extends far beyond the walls of our office.
Feel like you belong at HRT? Our goal is to find the best people and bring them together to do great work in a place where everyone is valued. HRT is proud of our diverse staff; we have offices all over the globe and benefit from our varied and unique perspectives. HRT is an equal opportunity employer; so whoever you are we’d love to get to know you.
